IEEE 1076.6-2004

Click here to purchase
Revision Standard – Inactive-Withdrawn.This document specifies a standard for use of very high-speed integrated circuit hardwaredescription language (VHDL) to model synthesizable register-transfer level digital logic. Astandard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset ofthe VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructsare identified that should be ignored or flagged as errors.

Product Details

Published:
10/11/2004
ISBN(s):
0738140651, 9780738140650, 9780738147796
Number of Pages:
118
File Size:
1 file , 690 KB
Product Code(s):
STD95360, STDWD95242